@String{NEUNET = "Neural Networks"} @String{TCAD = "IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD)"} @String{TVLSI = "IEEE Transactions on Very Large Scale Integration Systems (TVLSI)"} @String{DT = "IEEE Design \& Test"} @String{TACO = "ACM Transactions on Architecture and Code Optimization (TACO)"} @String{TECS = "ACM Transactions on Embedded Computing Systems (TECS)"} @String{TODAES = "ACM Transactions on Design Automation of Electronic Systems (TODAES)"} @String{SPLAN = "ACM SIGPLAN Notices"} @String{SARCH_CAN = "SIGARCH Computer Architecture News"} @String{SPE = "Software: Practice \& Experience (SP\&E)"} @String{JSA = "Journal of Systems Architecture"} @String{LNCS = "Lecture Notes in Computer Science"} @String{JSTS = "Journal of Semiconductor Technology and Science"} @String{TNANO = "IEEE Transactions on Nanotechnology"} @String{ACCESS = "IEEE Access"} @String{UNIST = "Ulsan National Institute of Science and Technology"} @String{INEUNET = "0893-6080"} @String{ITCAD = "0278-0070"} @String{ITVLSI = "1063-8210"} @String{IDT = "2168-2356"} @String{ITACO = "1544-3566"} @String{ITECS = "1539-9087"} @String{ITODAES = "1084-4309"} @String{ISPLAN = "0362-1340"} @String{ISARCH_CAN = "0163-5964"} @String{ISPE = "0038-0644"} @String{IJSA = "1383-7621"} @String{IJSTS = "1598-1657"} @String{ITNANO = "1536-125X"} @String{IACCESS = "2169-3536"} @String{IFNEUSCI = "1662-453X"} @String{IDAC = "0738-100x"} @inproceedings{jw23iccad, author = {Jaewoo Park and Chenghao Quan and Hyungon Moon and Jongeun Lee}, title = {Hyperdimensional Computing as a Rescue for Efficient Privacy-Preserving Machine Learning-as-a-Service}, booktitle = {International Conference on Computer-Aided Design (ICCAD)}, month = oct, date = {29-November 2}, year = 2023, } @inproceedings{jh23isocc, author = {Hyeonjin Jo and Chaerin Sim and Jaewoo Park and Jongeun Lee}, title = {Accelerating Transformers with {Fourier}-Based Attention for Efficient On-Device Inference}, booktitle = {the 20th International SoC Design Conference (ISOCC)}, month = oct, date = 25, year = 2023, location = {Jeju, South Korea}, } @inproceedings{jw23dac, author = {Jaewoo Park and Sugil Lee and Jongeun Lee}, title = {{NTT-PIM}: Row-Centric Architecture and Mapping for Efficient Number-Theoretic Transform on {PIM}}, booktitle = {the 60th Annual ACM/IEEE Design Automation Conference (DAC)}, pages = {1-6}, month = jul, date = 11, year = 2023, location = {San Francisco, CA}, } @ARTICLE{azat23tcad, author = {Azat Azamat and Faaiz Asim and Jintae Kim and Jongeun Lee}, title = {Partial Sum Quantization for Reducing {ADC} Size in {ReRAM}-based Neural Network Accelerators}, journal = TCAD, ISSN = ITCAD, volume = {}, number = {}, pages = {}, month = {}, year = 2023, doi = {10.1109/TCAD.2023.3294461}, } @ARTICLE{ha23access, author = {Seon Ha and Minsang Yu and Hyungon Moon and Jongeun Lee}, journal = ACCESS, ISSN = IACCESS, title = {Kernel Code Integrity Protection at the Physical Address Level on {RISC-V}}, year = 2023, volume = 11, number = {}, month = jun, pages = {62358-62367}, doi = {10.1109/ACCESS.2023.3285876}, } @ARTICLE{quan22tcad, author = {Chenghao Quan and Mohammed E. Fouda and Sugil Lee and Giju Jung and Jongeun Lee and Ahmed Eltawil and Fadi Kurdahi}, title = {Training-Free Stuck-at Fault Mitigation for {ReRAM}-based Deep Learning Accelerators}, journal = TCAD, ISSN = ITCAD, volume = 42, number = 7, pages = {2174-2186}, month = jul, year = 2023, doi = {10.1109/TCAD.2022.3222288}, } @article{sg22tcad, author = {Sugil Lee and Mohammed E. Fouda and Jongeun Lee and Ahmed Eltawil and Fadi Kurdahi}, title = {Offline Training-based Mitigation of {IR} Drop for {ReRAM}-based Deep Neural Network Accelerators}, journal = TCAD, ISSN = ITCAD, volume = 42, number = 2, pages = {521-532}, month = feb, year = 2023, doi = {10.1109/TCAD.2022.3177002}, } @inproceedings{faaiz22bmvc, author = {Faaiz Asim and Jaewoo Park and Azat Azamat and Jongeun Lee}, title = {Centered Symmetric Quantization for Hardware-Efficient Low-Bit Neural Networks}, booktitle = {British Machine Vision Conference (BMVC)}, month = nov, date = {21-24}, year = 2022, doi = {}, } @inproceedings{azat22iccad, author = {Azat Azamat and Jaewoo Park and Jongeun Lee}, title = {Squeezing Accumulators in Binary Neural Networks for Extremely Resource-Constrained Applications}, booktitle = {International Conference on Computer-Aided Design (ICCAD)}, month = oct, date = {30-November 4}, year = 2022, doi = {10.1145/3508352.3549418}, } @INPROCEEDINGS{quan22asilomar, author = {Chenghao Quan and Mohammed E. Fouda and Sugil Lee and Jongeun Lee}, booktitle = {2022 56th Asilomar Conference on Signals, Systems, and Computers}, title = {Multi-Fidelity Nonideality Simulation and Evaluation Framework for Resistive Neuromorphic Computing}, month = oct, date = {31-November 2}, year = 2022, volume = {}, number = {}, ISSN = {2576-2303}, pages = {1152-1156}, doi = {10.1109/IEEECONF56349.2022.10052098}, } @inproceedings{sg22iccd, author = {Sugil Lee and Mohammed Fouda and Jongeun Lee and Ahmed Eltawil and Fadi Kurdahi}, title = {Accurate Prediction of {ReRAM} Crossbar Performance Under {I-V} Nonlinearity and {IR} Drop}, booktitle = {International Conference on Computer Design (ICCD)}, pages = {9-16}, month = oct, date = {23-26}, year = 2022, doi = {10.1109/ICCD56317.2022.00013}, } @inproceedings{oh22eccv, author = {Sangyun Oh and Hyeonuk Sim and Jounghyun Kim and Jongeun Lee}, title = {Non-Uniform Step Size Quantization for Accurate Post-Training Quantization}, booktitle = {European Conference on Computer Vision (ECCV)}, month = oct, date = {23-27}, year = 2022, } @ARTICLE{jychoi22tcad, author = {Jooyeon Choi and Hyeonuk Sim and Sangyun Oh and Sugil Lee and Jongeun Lee}, title = {{MLogNet}: A Logarithmic Quantization-Based Accelerator for Depthwise Separable Convolution}, journal = TCAD, ISSN = ITCAD, volume = 41, number = 12, pages = {5220-5231}, month = dec, year = 2022, doi = {10.1109/TCAD.2022.3150249}, } @ARTICLE{jun21tcad, author = {Jungi Lee and Jongeun Lee}, title = {Specializing {CGRAs} for Light-Weight Convolutional Neural Networks}, journal = TCAD, ISSN = ITCAD, volume = 41, number = 10, pages = {3387-3399}, month = oct, year = 2022, doi = {10.1109/TCAD.2021.3123178}, } @inproceedings{azat21iccad, author = {Azat Azamat and Faaiz Asim and Jongeun Lee}, title = {Quarry: Quantization-based {ADC} Reduction for {ReRAM}-based Deep Neural Network Accelerators}, booktitle = {International Conference on Computer-Aided Design (ICCAD)}, pages = {1-7}, month = nov, date = {1-6}, year = 2021, doi = {10.1109/ICCAD51958.2021.9643502}, } @inproceedings{sg21iccd, author = {Sugil Lee and Mohammed Fouda and Jongeun Lee and Ahmed Eltawil and Fadi Kurdahi}, title = {Fast and Low-Cost Mitigation of {ReRAM} Variability for Deep Learning Applications}, booktitle = {International Conference on Computer Design (ICCD)}, pages = {269-276}, month = oct, date = {24-27}, year = 2021, doi = {10.1109/ICCD53106.2021.00051}, } @inproceedings{oh21cvpr, author = {Sangyun Oh and Hyeonuk Sim and Sugil Lee and Jongeun Lee}, title = {Automated Log-Scale Quantization for Low-Cost Deep Neural Networks}, booktitle = {Conference on Computer Vision and Pattern Recognition (CVPR)}, pages = {742-751}, month = jun, date = {19-25}, year = 2021, doi = {10.1109/CVPR46437.2021.00080}, } @inproceedings{jung21date, author = {Giju Jung and Mohammed Fouda and Sugil Lee and Jongeun Lee and Ahmed Eltawil and Fadi Kurdahi}, title = {Cost- and Dataset-free Stuck-at Fault Mitigation for {ReRAM}-based Deep Learning Accelerators}, booktitle = {Design, Automation and Test in Europe (DATE)}, pages = {1733-1738}, month = feb, date = {1-5}, year = 2021, doi = {10.23919/DATE51398.2021.9474226}, } @inproceedings{jun21date, author = {Jungi Lee and Jongeun Lee}, title = {{NP-CGRA}: Extending {CGRAs} for Efficient Processing of Light-weight Deep Neural Networks}, booktitle = {Design, Automation and Test in Europe (DATE)}, pages = {1408-1413}, month = feb, date = {1-5}, year = 2021, doi = {10.23919/DATE51398.2021.9474256}, } @article{fouda20qnn, author = {Mohammed E. Fouda and Sugil Lee and Jongeun Lee and Gun Hwan Kim and Fadi Kurdahi and Ahmed Eltawil}, title = {{IR-QNN} Framework: An {IR} Drop-Aware Offline Training of Quantized Crossbar Arrays}, journal = ACCESS, publisher = {IEEE}, ISSN = IACCESS, volume = 8, pages = {228392-228408}, month = dec, date = 14, year = 2020, doi = {10.1109/ACCESS.2020.3044652}, } @article{sim20frontiers, author = {Hyeonuk Sim and Jongeun Lee}, title = {Bitstream-based Neural Network for Scalable, Efficient and Accurate Deep Learning Hardware}, journal = {Frontiers in Neuroscience}, publisher = {Frontiers}, ISSN = IFNEUSCI, volume = 14, pages = 1198, month = dec, date = 23, year = 2020, doi = {10.3389/fnins.2020.543472}, } @inproceedings{segi20gls, author = {Segi Lee and Sugil Lee and Jongeun Lee and Jong-Moon Choi and Do-Wan Kwon and Seung-Kwang Hong and Kee-Won Kwon}, title = {Architecture-Accuracy Co-optimization of {ReRAM}-based Low-cost Neural Network Processor}, booktitle = {the 30th ACM Great Lakes Symposium on VLSI (GLSVLSI)}, pages = {427-432}, month = sep, date = 7, year = 2020, location = {Beijing, China (Virtual)}, ISBN = {978-1-4503-7944-1/20/09}, doi = {10.1145/3386263.3406954}, } @inproceedings{sim20islped, author = {Hyeonuk Sim and Jooyeon Choi and Jongeun Lee}, title = {{SparTANN}: Sparse Training Accelerator for Neural Networks with Threshold-based Sparsification}, booktitle = {ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED)}, pages = {211-216}, month = aug, date = 10, year = 2020, ISBN = {978-1-4503-7053-0/20/08}, doi = {10.1145/3370748.3406554}, } @inproceedings{sg20dac, author = {Sugil Lee and Mohammed Fouda and Jongeun Lee and Ahmed Eltawil and Fadi Kurdahi}, title = {Learning to Predict {IR} Drop with Effective Training for {ReRAM}-based Neural Network Hardware}, booktitle = {the 57th Annual ACM/IEEE Design Automation Conference (DAC)}, pages = {1-6}, month = jul, date = 20, year = 2020, location = {San Francisco, CA (Virtual)}, doi = {10.1109/DAC18072.2020.9218735}, } @article{oh20access, author = "Sangyun Oh and Hye-Jin S. Kim and Jongeun Lee and Junmo Kim", title = "RRNet: Repetition-Reduction Network for Energy Efficient Depth Estimation", journal = ACCESS, ISSN = IACCESS, publisher = "IEEE", volume = 8, pages = "106097-106108", month = jun, date = 8, year = 2020, doi = {10.1109/ACCESS.2020.3000773}, } @article{sim19neunet, author = {Hyeonuk Sim and Jongeun Lee}, title = {Cost-effective Stochastic {MAC} Circuits for Deep Neural Networks}, journal = NEUNET, ISSN = INEUNET, publisher = {Elsevier}, volume = 117, pages = {152-162}, month = sep, year = 2019, doi = {10.1016/j.neunet.2019.04.017}, } @article{fouda19tnano, author = {Mohammed E. Fouda and Sugil Lee and Jongeun Lee and Ahmed Eltawil and Fadi Kurdahi}, title = {Mask Technique for Fast and Efficient Training of Binary Resistive Crossbar Arrays}, journal = TNANO, ISSN = ITNANO, publisher = {IEEE}, volume = 18, pages = {704-716}, month = jul, date = 15, year = 2019, doi = {10.1109/TNANO.2019.2927493}, } @inproceedings{sg19dac, author = {Sugil Lee and Hyeonuk Sim and Jooyeon Choi and Jongeun Lee}, title = {Successive Log Quantization for Cost-Efficient Neural Networks Using Stochastic Computing}, booktitle = {the 56th Annual ACM/IEEE Design Automation Conference (DAC)}, pages = {7:1-7:6}, month = jun, date = 2, year = 2019, doi = {10.1145/3316781.3317916}, } @inproceedings{segi19kcs, author = {Segi Lee and Aidyn Zhakatayev and Jongeun Lee}, title = {{FPGA} Prototyping of Local Binary Convolutional Neural Network}, booktitle = {the 26th Korean Conference on Semiconductors}, month = feb, date = 13, year = 2019, } @inproceedings{aidyn19aspdac_lbcnn, author = {Aidyn Zhakatayev and Jongeun Lee}, title = {Efficient {FPGA} Implementation of Local Binary Convolutional Neural Network}, booktitle = {the 24th Asia and South Pacific Design Automation Conference (ASP-DAC)}, month = jan, date = 21, year = 2019, pages = {699-704}, numpages = 6, doi = {10.1145/3287624.3287719}, } @inproceedings{dw19aspdac_dtse, author = {Daewoo Kim and Sugil Lee and Jongeun Lee}, title = {On-chip Memory Optimization for High-level Synthesis of Multi-dimensional Data on {FPGA}}, booktitle = {the 24th Asia and South Pacific Design Automation Conference (ASP-DAC)}, month = jan, date = 21, year = 2019, pages = {243-248}, numpages = 6, doi = {10.1145/3287624.3287669}, } @inproceedings{sim19aspdac_logsc, author = {Hyeonuk Sim and Jongeun Lee}, title = {Log-Quantized Stochastic Computing for Memory and Computation Efficient {DNNs}}, booktitle = {the 24th Asia and South Pacific Design Automation Conference (ASP-DAC)}, month = jan, date = 21, year = 2019, pages = {280-285}, numpages = 6, doi = {10.1145/3287624.3287714}, } @inproceedings{sim19aspdac_xoma, author = {Hyeonuk Sim and Jason H. Anderson and Jongeun Lee}, title = {{XOMA}: Exclusive On-Chip Memory Architecture for Energy-Efficient Deep Learning Acceleration}, booktitle = {the 24th Asia and South Pacific Design Automation Conference (ASP-DAC)}, month = jan, date = 21, year = 2019, pages = {651-656}, numpages = 6, doi = {10.1145/3287624.3287713}, } @ARTICLE{sg19tcad, author = {Sugil Lee and Daewoo Kim and Dong Nguyen and Jongeun Lee}, title = {Double {MAC} on a {DSP}: Boosting the Performance of Convolutional Neural Networks on {FPGAs}}, journal = TCAD, ISSN = ITCAD, volume = 38, number = 5, pages = {888-897}, month = may, year = 2019, doi = {10.1109/TCAD.2018.2824280}, } @inproceedings{fpt18, author = {Jin-Hee Kim and Jongeun Lee and Jason H. Anderson}, title = {{FPGA} Architecture Enhancements for Efficient {BNN} Implementation}, booktitle = {IEEE International Conference on Field Programmable Technology (FPT)}, year = 2018, pages = {214-221}, month = dec, date = 10, doi = {10.1109/FPT.2018.00039}, } @ARTICLE{aidyn18tcad, author = {Aidyn Zhakatayev and Kyounghoon Kim and Jongeun Lee and Kiyoung Choi}, title = {An Efficient and Accurate Stochastic Number Generator Using Even-distribution Coding}, journal = TCAD, ISSN = ITCAD, volume = 37, number = 12, pages = {3056-3066}, month = dec, year = 2018, doi = {10.1109/TCAD.2018.2789732}, } @inproceedings{fouda18, author = {Mohammed E. Fouda and Jongeun Lee and Ahmed M. Eltawil and Fadi Kurdahi}, title = {Overcoming Crossbar Nonidealities in Binary Neural Networks Through Learning}, booktitle = {the 14th IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH)}, year = 2018, month = jul, date = 18, doi = {10.1145/3232195.3232226}, } @inproceedings{oh18, author = {Sangyun Oh and Jongeun Lee and Hye-Jin S. Kim}, title = {Fast and Light-Weight Unsupervised Depth Estimation for Mobile {GPU} Hardware}, booktitle = {Computer Vision and Pattern Recognition Workshops (CVPRW), Deep Vision}, year = 2018, month = jul, date = 18, } @inproceedings{sim18dac, author = {Hyeonuk Sim and Saken Kenzhegulov and Jongeun Lee}, title = {{DPS}: Dynamic Precision Scaling for Stochastic Computing-Based Deep Neural Networks}, booktitle = {the 55th Annual ACM/IEEE Design Automation Conference (DAC)}, pages = {13:1-13:6}, month = jun, date = 24, year = 2018, doi = {10.1145/3195970.3196028}, } @inproceedings{aidyn18dac, author = {Aidyn Zhakatayev and Sugil Lee and Hyeonuk Sim and Jongeun Lee}, title = {Sign-Magnitude {SC}: Getting 10X Accuracy for Free in Stochastic Computing for Deep Neural Networks}, booktitle = {the 55th Annual ACM/IEEE Design Automation Conference (DAC)}, pages = {158:1-158:6}, month = jun, date = 24, year = 2018, doi = {10.1145/3195970.3196113}, } @inproceedings{chin18ispd, author = {S. Alexander Chin and Kuang Ping Niu and Matthew Walker and Shizhang Yin and Alexander Mertens and Jongeun Lee and Jason H. Anderson}, title = {Architecture Exploration of Standard-Cell and {FPGA}-Overlay {CGRA}s Using the Open-Source {CGRA-ME} Framework}, booktitle = {International Symposium on Physical Design (ISPD)}, month = mar, date = 25, year = 2018, doi = {10.1145/3177540.3177553}, } @inproceedings{aidyn18kcs, author = {Aidyn Zhakatayev and Jongeun Lee}, title = {Reducing {FPGA} Area Using Nano-Switch Devices in Inter and Intra-Logic Routing}, booktitle = {the 25th Korean Conference on Semiconductors}, month = feb, date = 5, year = 2018, } @inproceedings{kim17fpt, author = {Daewoo Kim and Mansureh S. Moghaddam and Hossein Moradian and Hyeonuk Sim and Jongeun Lee and Kiyoung Choi}, title = {{FPGA} Implementation of Convolutional Neural Network Based on Stochastic Computing}, booktitle = {IEEE International Conference on Field-Programmable Technology (FPT)}, pages = {287-290}, month = dec, date = 11, year = 2017, location = {Melbourne, Australia}, doi = {10.1109/FPT.2017.8280162}, } @ARTICLE{oh17tcad, author = {Sangyun Oh and Hongsik Lee and Jongeun Lee}, title = {Efficient Execution of Stream Graphs on Coarse-Grained Reconfigurable Architectures}, journal = TCAD, ISSN = ITCAD, volume = 36, number = 12, pages = {1978-1988}, month = dec, year = 2017, doi = {10.1109/TCAD.2017.2682645}, } @inproceedings{yu17iccd, author = {Joonsang Yu and Kyounghoon Kim and Jongeun Lee and Kiyoung Choi}, title = {Accurate and Efficient Stochastic Computing Hardware for Convolutional Neural Networks}, booktitle = {IEEE International Conference on Computer Design (ICCD)}, pages = {105-112}, month = nov, date = 5, year = 2017, doi = {10.1109/ICCD.2017.24}, } @inproceedings{sim17dac, author = {Hyeonuk Sim and Jongeun Lee}, title = {A New Stochastic Computing Multiplier with Application to Deep Convolutional Neural Networks}, booktitle = {the 54th Annual ACM/IEEE Design Automation Conference (DAC)}, pages = {29:1-29:6}, month = jun, date = 18, year = 2017, doi = {10.1145/3061639.3062290}, } @inproceedings{rahman17date, author = {Atul Rahman and Sangyun Oh and Jongeun Lee and Kiyoung Choi}, title = {Design Space Exploration of {FPGA} Accelerators for Convolutional Neural Networks}, booktitle = {Design, Automation and Test in Europe (DATE)}, pages = {1147-1152}, month = mar, date = 27, year = 2017, doi = {10.23919/DATE.2017.7927162}, } @inproceedings{nguyen17date, author = {Dong Nguyen and Daewoo Kim and Jongeun Lee}, title = {Double {MAC}: Doubling the Performance of Convolutional Neural Networks on Modern {FPGAs}}, booktitle = {Design, Automation and Test in Europe (DATE)}, pages = {890-893}, month = mar, date = 27, year = 2017, doi = {10.23919/DATE.2017.7927113}, } @inproceedings{sim17aspdac, author = {Hyeonuk Sim and Dong Nguyen and Jongeun Lee and Kiyoung Choi}, title = {Scalable Stochastic-Computing Accelerator for Convolutional Neural Networks}, booktitle = {the 22nd Asia and South Pacific Design Automation Conference (ASP-DAC)}, month = jan, date = 16, year = 2017, pages = {696-701}, numpages = 6, doi = {10.1109/ASPDAC.2017.7858405}, } @inproceedings{seo16bnn, author = {Jungwoo Seo and Joonsang Yu and Jongeun Lee and Kiyoung Choi}, title = {A New Approach to Binarizing Neural Networks}, booktitle = {the 13th International SoC Design Conference (ISOCC)}, month = oct, date = 23, year = 2016, pages = {77-78}, numpages = 2, doi = {10.1109/ISOCC.2016.7799741}, } @article{sim16tvlsi, author = {Hyeonuk Sim and Atul Rahman and Jongeun Lee}, title = {Efficient High-Level Synthesis for Nested Loops of Nonrectangular Iteration Spaces}, journal = TVLSI, issn = ITVLSI, volume = 24, number = 8, year = 2016, pages = {2799-2802}, keywords = {field programmable gate arrays;high level synthesis;pipeline arithmetic;Vivado high level synthesis tool;field programmable gate arrays;loop control overhead;nonrectangular iteration spaces;pipelining nested loops;triangular IS;Field programmable gate arrays;Logic gates;Optimization;Pipeline processing;Program processors;Shape;Very large scale integration;Field-programmable gate array (FPGA);high level synthesis;loop coalescing;loop flattening;nested loop;triangular iteration space}, month = aug, doi = {10.1109/TVLSI.2016.2520491}, } @article{sim16tcad, author = {Sim, Hyeonuk and Lee, Hongsik and Seo, Seongseok and Jongeun Lee}, title = {Mapping Imperfect Loops to Coarse-Grained Reconfigurable Architectures}, journal = TCAD, issn = ITCAD, issue_date = {July 2016}, volume = 35, number = 7, pages = {1092-1104}, numpages = 13, month = jul, year = 2016, acmid = 2965120, publisher = {IEEE Press}, address = {Piscataway, NJ, USA}, doi = {10.1109/TCAD.2015.2504918}, } @inproceedings{kim16dac, author = {Kyounghoon Kim and Jungki Kim and Joonsang Yu and Jungwoo Seo and Jongeun Lee and Kiyoung Choi}, title = {Dynamic Energy-Accuracy Trade-off Using Stochastic Computing in Deep Neural Networks}, booktitle = {the 53rd Annual ACM/IEEE Design Automation Conference (DAC)}, pages = {124:1-124:6}, month = jun, date = 5, year = 2016, doi = {10.1145/2897937.2898011}, } @inproceedings{rahman16date, author = {Atul Rahman and Jongeun Lee and Kiyoung Choi}, title = {Efficient FPGA Acceleration of Convolutional Neural Networks Using Logical-3D Compute Array}, booktitle = {Design, Automation and Test in Europe (DATE)}, pages = {1393-1398}, month = mar, date = 14, year = 2016, } @inproceedings{nguyen16cgo, author = {Nguyen, Dong and Jongeun Lee}, title = {Communication-Aware Mapping of Stream Graphs for Multi-GPU Platforms}, booktitle = {the 2016 International Symposium on Code Generation and Optimization (CGO)}, month = mar, date = 14, year = 2016, location = {Barcelona, Spain}, pages = {94-104}, publisher = {ACM}, address = {New York, NY, USA}, doi = {10.1145/2854038.2854055}, } @inproceedings{kim16aspdac, author = {Kyounghoon Kim and Jongeun Lee and Kiyoung Choi}, title = {An Energy-Efficient Random Number Generator for Stochastic Circuits}, booktitle = {the 21st Asia and South Pacific Design Automation Conference (ASP-DAC)}, month = jan, date = 25, year = 2016, pages = {256-261}, numpages = 6, doi = {10.1109/ASPDAC.2016.7428020}, } @article{kim15jsts, author = {Kim, Yongjoo and Lee, Jinyong and Lee, Jongeun and Paek, Yunheung}, title = {Scalable Application Mapping for {SIMD} Reconfigurable Architecture}, journal = JSTS, issn = IJSTS, volume = 6, number = 15, pages = {634-646}, numpages = 13, month = dec, year = 2015, publisher = {IEEK}, address = {South Korea}, doi = {10.5573/JSTS.2015.15.6.634}, } @inproceedings{kim15isocc, author = {Kyounghoon Kim and Jongeun Lee and Kiyoung Choi}, title = {Approximate De-randomizer for Stochastic Circuits}, booktitle = {the 12th International SoC Design Conference (ISOCC)}, month = nov, date = 2, year = 2015, numpages = 2, } @inproceedings{lee15dac, author = {Lee, Hongsik and Nguyen, Dong and Jongeun Lee}, title = {Optimizing Stream Program Performance on CGRA-based Systems}, booktitle = {the 52nd Annual Design Automation Conference (DAC)}, series = {DAC '15}, date = 7, month = jun, year = 2015, isbn = {978-1-4503-3520-1}, location = {San Francisco, California}, pages = {110:1-110:6}, articleno = 110, numpages = 6, acmid = 2744884, publisher = {ACM}, address = {New York, NY, USA}, doi = {10.1145/2744769.2744884}, } @inproceedings{atul15kcs, author = {Atul Rahman and Hyeonuk Sim and Jongeun Lee}, title = {Pipelining Nested Loops with Triangular Iteration Space for High-Level Synthesis}, booktitle = {the 22nd Korean Conference on Semiconductors}, month = feb, date = 11, year = 2015, } @inproceedings{lee15kcs, author = {Hongsik Lee and Jongeun Lee}, title = {Optimization of Streaming Application with Limited Scratch-pad Memory on Coarse-Grained Reconfigurable Architecture}, booktitle = {the 22nd Korean Conference on Semiconductors}, month = feb, date = 11, year = 2015, } @inproceedings{dong15kcs, author = {Dong Nguyen and Jongeun Lee}, title = {Optimal Resource-aware Mapping of Stream Graphs to GP-GPUs}, booktitle = {the 22nd Korean Conference on Semiconductors}, month = feb, date = 12, year = 2015, } @inproceedings{lee14flatten, author = {Lee, Jongeun and Seo, Seongseok and Lee, Hongsik and Sim, Hyeon Uk}, title = {Flattening-based Mapping of Imperfect Loop Nests for CGRAs}, booktitle = {the 2014 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS)}, series = {CODES '14}, date = 12, month = oct, year = 2014, isbn = {978-1-4503-3051-0}, location = {New Delhi, India}, pages = {9:1-9:10}, articleno = 9, numpages = 10, acmid = 2656085, publisher = {ACM}, address = {New York, NY, USA}, doi = {10.1145/2656075.2656085}, } @unpublished{lee14lctes, author = {Lee, Jinyong and Lee, Jongwon and Lee, Jongeun and Paek, Yunheung}, title = {Improving Performance of Loops on DIAM-based VLIW Architectures}, booktitle = {the 2014 SIGPLAN/SIGBED Conference on Languages, Compilers and Tools for Embedded Systems}, series = {LCTES '14}, year = 2014, isbn = {978-1-4503-2877-7}, location = {Edinburgh, United Kingdom}, pages = {135-144}, numpages = 10, publisher = {ACM}, acmid = 2597825, address = {New York, NY, USA}, keywords = {code size, dynamic implied addressing mode, loop, loop unrolling, performance, reduced bit-width isa, vliw architecture}, doi = {10.1145/2597809.2597825}, } @article{lee14lctes_sigplan, author = {Lee, Jinyong and Lee, Jongwon and Lee, Jongeun and Paek, Yunheung}, title = {Improving Performance of Loops on DIAM-based VLIW Architectures}, journal = SPLAN # " (LCTES '14)", issn = ISPLAN, issue_date = {May 2014}, volume = 49, number = 5, pages = {135-144}, numpages = 10, month = jun, year = 2014, publisher = {ACM}, acmid = 2597825, address = {New York, NY, USA}, keywords = {code size, dynamic implied addressing mode, loop, loop unrolling, performance, reduced bit-width isa, vliw architecture}, doi = {10.1145/2666357.2597825}, } @inproceedings{mai14rbt, author = {Mai, Toan X. and Jongeun Lee}, title = {Efficient Software-Based Runtime Binary Translation for Coarse-Grained Reconfigurable Architectures}, booktitle = {the 2014 IEEE International Parallel \& Distributed Processing Symposium (IPDPS) Workshops (RAW)}, series = {IPDPSW '14}, year = 2014, month = may, isbn = {978-1-4799-4116-2}, pages = {132-140}, numpages = 9, acmid = 2673074, publisher = {IEEE Computer Society}, address = {Washington, DC, USA}, doi = {10.1109/IPDPSW.2014.19}, } @article{lee14todaes, author = {Lee, Jongeun and Seo, Seongseok and Paek, Jongkyung and Choi, Kiyoung}, title = {Configurable Range Memory for Effective Data Reuse on Programmable Accelerators}, journal = TODAES, issn = ITODAES, issue_date = {March 2014}, volume = 19, number = 2, pages = {13:1-13:22}, articleno = 13, numpages = 22, month = mar, year = 2014, publisher = {ACM}, acmid = 2566662, address = {New York, NY, USA}, keywords = {On-chip memory architectures and management, array mapping, coarse-grained reconfigurable architecture, compiler-controlled memories, scratchpads}, doi = {10.1145/2566662}, } @article{lee14jsa_rtcsa12, author = {Jongeun Lee and Steve Goddard and Chin-Fu Kuo}, title = {Design and Optimization for Embedded and Real-time Computing Systems and Applications}, journal = JSA, issn = IJSA, volume = 60, number = 2, pages = 151, month = feb, year = 2014, doi = {10.1016/j.sysarc.2014.01.001}, } @inproceedings{seo14kcs, author = {Seongseok Seo and Hyeonuk Sim and Jongeun Lee}, title = {New Processing Element for Imperfect Nested Loops on Coarse Grained Reconfigurable Architecture}, booktitle = {the 21st Korean Conference on Semiconductors}, month = feb, date = 26, year = 2014, } @inproceedings{sim14kcs, author = {Hyeonuk Sim and Seongseok Seo and Jongeun Lee}, title = {FPGA Prototyping of Programmable Regular Iterator Generator}, booktitle = {the 21st Korean Conference on Semiconductors}, month = feb, date = 26, year = 2014, } @article{jeong13taco, author = {Jeong, Yeonghun and Seo, Seongseok and Jongeun Lee}, title = {Evaluator-executor Transformation for Efficient Pipelining of Loops with Conditionals}, journal = TACO, issn = ITACO, issue_date = {December 2013}, volume = 10, number = 4, pages = {62:1-62:23}, articleno = 62, numpages = 23, month = dec, year = 2013, publisher = {ACM}, acmid = 2555317, address = {New York, NY, USA}, keywords = {Coarse-grained reconfigurable architecture (CGRA), conditional statements, control divergence, loop fission, predicated execution, software pipelining}, doi = {10.1145/2541228.2555317}, } @article{lee13tecs, author = {Jongeun Lee and Aviral Shrivastava}, title = {Software-based Register File Vulnerability Reduction for Embedded Processors}, journal = TECS, issn = ITECS, volume = 13, number = {1s}, pages = {38:1-38:20}, month = nov, year = 2013, publisher = {ACM}, doi = {10.1145/2536747.2536760}, } @article{yoon13todaes, author = {Jonghee W. Yoon and Jongeun Lee and Sanghyun Park and Yongjoo Kim and Jinyong Lee and Yunheung Paek and Doosan Cho}, title = {Architecture Customization of On-Chip Reconfigurable Accelerators}, journal = TODAES, issn = ITODAES, issue_date = {October 2013}, volume = 18, number = 4, pages = {52:1-52:22}, articleno = {52}, numpages = {22}, month = oct, year = 2013, publisher = {ACM}, doi = {10.1145/2493384}, } @inproceedings{han13date, author = {Kyuseung Han and Kiyoung Choi and Jongeun Lee}, title = {Compiling Control-Intensive Loops for {CGRA}s with State-Based Full Predication}, booktitle = {Design, Automation and Test in Europe (DATE)}, pages = {1579-1582}, month = mar, date = 21, year = 2013, } @inproceedings{lee13date, author = {Jongeun Lee and Yeonghun Jeong and Sungsok Seo}, title = {Fast Shared On-Chip Memory Architecture for Efficient Hybrid Computing with {CGRA}s}, booktitle = {Design, Automation and Test in Europe (DATE)}, pages = {1575-1578}, month = mar, date = 21, year = 2013, } @inproceedings{seo13kcs, author = {Sungsok Seo and Yeonghun Jeong and Jongeun Lee}, title = {Mapping {DSP} Loops to Reconfigurable Processor Accelerators}, booktitle = {the 20th Korean Conference on Semiconductors}, month = feb, date = 6, year = 2013, } @inproceedings{jeong13kcs, author = {Yeonghun Jeong and Sungsok Seo and Jongeun Lee}, title = {Selective Execution of Conditional Statements for {CGRA}s}, booktitle = {the 20th Korean Conference on Semiconductors}, month = feb, date = 6, year = 2013, } @misc{yoon13pat, title = {재구성형 프로세싱 어레이 구조 생성 방법}, titleE = {Method for producing reconfigurable processing array architecture}, inventor = {윤종희, 이종은, 박상현, 김용주, 조두산, 백윤흥}, assignee = {서울대학교산학협력단}, appl_no = {10-2011-0015038}, filing_date = {2011.02.21}, pat_no = {1012707630000}, issue_date = {2013.05.28}, publisher = {Korea}, year = 2013, } @misc{kim13pat1, title = {코어스 그레인드 재구성 구조를 위한 코드 생성 장치 및 그 코드 생성 방법}, titleE = {Method and apparatus of generating code for coarse-grained reconfigurable architecture}, inventor = {김용주, 이종은, 백윤흥, 오 스티븐 상근}, assignee = {서울대학교 산학협력단, 주식회사 이더블유비엠코리아, 울산과학기술대학교 산학협력단}, appl_no = {10-2012-0018326}, filing_date = {2012.02.23}, pat_no = {1012937000000}, issue_date = {2013.07.31}, publisher = {Korea}, year = 2013, } @misc{kim13pat2, title = {코어스 그레인드 재구성 어레이에서의 중첩 루프문 수행 장치 및 그 방법}, titleE = {Method and apparatus of executing nested loop on coarse-grained reconfigurable array}, inventor = {김용주, 이종은, 백윤흥, 오 스티븐 상근}, assignee = {서울대학교 산학협력단, 주식회사 이더블유비엠코리아, 울산과학기술대학교 산학협력단}, appl_no = {10-2012-0018327}, filing_date = {2012.02.23}, pat_no = {1012937010000}, issue_date = {2013.07.31}, publisher = {Korea}, year = 2013, } @inproceedings{mai12fpt, author = {Toan X. Mai and Jongeun Lee}, title = {Software-Managed Automatic Data Sharing for Coarse-Grained Reconfigurable Coprocessors}, booktitle = {IEEE International Conference on Field-Programmable Technology (FPT)}, pages = {277-284}, month = dec, date = 11, year = 2012, doi = {10.1109/FPT.2012.6412148}, } @article{lee12tecs, author = {Jongeun Lee and Aviral Shrivastava}, title = {{PICA}: Processor Idle Cycle Aggregation for Energy-Efficient Embedded Systems}, journal = TECS, issn = ITECS, volume = 11, number = 2, pages = {26:1-26:27}, year = 2012, month = jul, publisher = {ACM}, } @article{hong12tvlsi, author = {Fei Hong and Aviral Shrivastava and Jongeun Lee}, title = {Return Data Interleaving for Multi-Channel Embedded {CMP}s Systems}, journal = TVLSI, issn = ITVLSI, volume = 20, number = 7, pages = {1351-1354}, year = 2012, month = jul, publisher = {IEEE}, } @inproceedings{kim12arc, author = {Yongjoo Kim and Jongeun Lee and Jinyong Lee and Toan X. Mai and Ingoo Heo and Yunheung Paek}, title = {Exploiting Both Pipelining and Data Parallelism with {SIMD} Reconfigurable Architecture}, booktitle = {International Symposium on Applied Reconfigurable Computing (ARC), } # LNCS, volume = 7199, month = mar, date = 22, year = 2012, pages = {40-52}, doi = {10.1007/978-3-642-28365-9_4}, } @inproceedings{mai12kcs, author = {Toan X. Mai and Yeonghun Jeong and Jongeun Lee}, title = {Promoting Data Reuse on Shared Memory of Hybrid System}, booktitle = {the 19th Korean Conference on Semiconductors}, month = feb, date = 17, year = 2012, pages = {593-594}, } @article{kim12taco, author = {Kim, Yongjoo and Jongeun Lee and Mai, Toan X. and Paek, Yunheung}, title = {Improving Performance of Nested Loops on Reconfigurable Array Processors}, journal = TACO, issn = ITACO, issue_date = {January 2012}, volume = {8}, number = {4}, month = jan, year = 2012, pages = {32:1-32:23}, articleno = {32}, numpages = {23}, acmid = {2086711}, publisher = {ACM}, address = {New York, NY, USA}, doi = {10.1145/2086696.2086711}, } @misc{kim11pat, title = {코어스 그레인드 재구성 어레이에서의 애플리케이션 매핑 최적화 방법 및 그 장치}, titleE = {Method and apparatus of optimal application mapping on coarse-grained reconfigurable array}, inventor = {김용주, 이종은, 윤종희, 백윤흥}, assignee = {서울대학교산학협력단, 광운대학교 산학협력단}, appl_no = {10-2010-0040861}, filing_date = {2010.04.30}, pat_no = {10-1101992-0000}, issue_date = {2011.12.27}, publisher = {Korea}, year = 2011, } @article{kim11tcad, author = {Yongjoo Kim and Jongeun Lee and Aviral Shrivastava and Jonghee W. Yoon and Doosan Cho and Yunheung Paek}, title = {High Throughput Data Mapping for Coarse-Grained Reconfigurable Architectures}, journal = TCAD, issn = ITCAD, volume = 30, number = 11, pages = {1599-1609}, year = 2011, month = nov, publisher = {IEEE}, } @article{kim11todaes_multibank, author = {Yongjoo Kim and Jongeun Lee and Aviral Shrivastava and Yunheung Paek}, title = {Memory Access Optimization in Compilation for Coarse Grained Reconfigurable Architectures}, journal = TODAES, issn = ITODAES, issue_date = {October 2011}, volume = 16, number = 4, month = oct, year = 2011, pages = {42:1-42:27}, articleno = {42}, numpages = {27}, publisher = {ACM}, } @inproceedings{han11mwcas, author = {Kyuseung Han and Seongsik Park and Kiyoung Choi and Jong Kyung Paek and Jongeun Lee}, booktitle = {2011 IEEE 54th International Midwest Symposium on Circuits and Systems (MWSCAS)}, title = {Techniques for improving coarse-grained reconfigurable architectures}, volume = {}, number = {}, pages = {1-4}, ISSN = {1558-3899}, month = aug, year = 2011, doi = {10.1109/MWSCAS.2011.6026299}, } @article{youn11spe, author = {Jonghee M. Youn and Jongwon Lee and Yunheung Paek and Jongeun Lee and Hanno Scharwaechter and Rainer Leupers}, title = {Fast graph-based instruction selection for multi-output instructions}, journal = SPE, issn = ISPE, volume = 41, number = 6, pages = {717-736}, year = 2011, month = may, publisher = {Wiley}, doi = {10.1002/spe.1034}, } @inproceedings{paek11raw, author = {Jongkyung Paek and Jongeun Lee and Kiyoung Choi}, title = {{CRM}: Configurable Range Memory for Fast Reconfigurable Computing}, booktitle = {Reconfigurable Architecture Workshop (RAW)}, pages = {158-165}, month = may, date = 16, year = 2011, } @article{lee11tcad, author = {Jongeun Lee and Aviral Shrivastava}, title = {Static Analysis of Register File Vulnerability}, journal = TCAD, issn = ITCAD, volume = 30, number = 4, pages = {607-616}, year = 2011, month = apr, publisher = {IEEE}, } @inproceedings{yoon11date, author = {Jonghee W. Yoon and Jongeun Lee and Jaewan Jung and Sanghyun Park and Yongjoo Kim and Yunheung Paek and Doosan Cho}, title = "I$^2${CRF}: Incremental Interconnect Customization for Embedded Reconfigurable Fabrics", booktitle = {Design, Automation and Test in Europe (DATE)}, pages = {206-211}, month = mar, date = 17, year = 2011, } @article{paek10sigarch, author = {Paek, Jong Kyung and Choi, Kiyoung and Lee, Jongeun}, title = {Binary Acceleration Using Coarse-Grained Reconfigurable Architecture}, journal = SARCH_CAN, issn = ISARCH_CAN, issue_date = {September 2010}, volume = 38, number = 4, month = sep, year = 2010, pages = {33-39}, numpages = {7}, acmid = {1926374}, publisher = {ACM}, address = {New York, NY, USA}, doi = {10.1145/1926367.1926374}, } @unpublished{paek10binary, author = {Jongkyung Paek and Kiyoung Choi and Jongeun Lee}, title = {Binary Acceleration Using Coarse-Grained Reconfigurable Architecture}, booktitle = {International Workshop on Highly Efficient Accelerators and Reconfigurable Technologies}, pages = {206-211}, month = jun, year = 2010, } @article{lee10tcad_hybrid, author = {Jongeun Lee and Aviral Shrivastava}, title = {A Compiler-Microarchitecture Hybrid Approach to Soft Error Reduction for Register Files}, journal = TCAD, issn = ITCAD, volume = 29, number = 7, month = jul, year = 2010, pages = {1018-1027}, publisher = {IEEE Press}, address = {Piscataway, NJ, USA}, doi = {10.1109/TCAD.2010.2049050}, } @article{kim10lctes_operation, author = {Yongjoo Kim and Jongeun Lee and Aviral Shrivastava and Yunheung Paek}, title = {Operation and Data Mapping for {CGRA}s with Multi-Bank Memory}, journal = SPLAN # " (LCTES '10)", issn = ISPLAN, volume = 45, number = 4, pages = {17-26}, month = apr, date = 13, year = 2010, doi = {10.1145/1755951.1755892}, } @article{shrivastava10cache, author = {Aviral Shrivastava and Jongeun Lee and Reiley Jeyapaul}, title = {Cache Vulnerability Equations for Protecting Data in Embedded Processor Caches from Soft Errors}, journal = SPLAN # " (LCTES '10)", issn = ISPLAN, volume = 45, number = 4, pages = {143-152}, month = apr, date = 13, year = 2010, doi = {10.1145/1755951.1755910}, } @inproceedings{kim10hipeac_memory, author = {Yongjoo Kim and Jongeun Lee and Aviral Shrivastava and Jonghee W. Yoon and Yunheung Paek}, title = {Memory-Aware Application Mapping on Coarse-Grained Reconfigurable Arrays}, booktitle = {International Conference on High-Performance and Embedded Architectures and Compilers (HiPEAC), } # LNCS, volume = 5952, month = jan, year = {2010}, pages = {171-185}, doi = {10.1007/978-3-642-11515-8_14}, } @article{shrivastava09tcad, author = "Aviral Shrivastava and Arun Kannan and Jongeun Lee", title = "A Software-Only Solution to Use Scratch Pads for Stack Data", journal = TCAD, issn = ITCAD, volume = 28, number = 11, pages = {1719-1727}, month = nov, year = 2009, doi = {10.1109/TCAD.2009.2030592}, } @article{lee09lctes, author = {Jongeun Lee and Aviral Shrivastava}, title = {A Compiler Optimization to Reduce Soft Errors in Register Files}, journal = SPLAN # " (LCTES '09)", issn = ISPLAN, volume = 44, number = 7, month = jul, year = 2009, pages = {41-49}, doi = {10.1145/1542452.1542459}, publisher = {ACM}, address = {New York, NY, USA}, } @inproceedings{lee09static, title = "Static Analysis to Mitigate Soft Errors in Register Files", author = {Jongeun Lee and Aviral Shrivastava}, booktitle = {Design, Automation and Test in Europe (DATE)}, page = {1367-1372}, year = 2009, month = apr, doi = {10.1109/DATE.2009.5090877}, } @inproceedings{mylav09fsaf, title = "{FSAF}: File System Aware Flash Translation Layer for {NAND} Flash Memories", author = {Sai Mylavarapu and Choudhuri, S. and Aviral Shrivastava and Jongeun Lee}, booktitle = {Design, Automation and Test in Europe (DATE)}, page = {399-404}, year = 2009, month = apr, doi = {10.1109/DATE.2009.5090696}, } @inproceedings{lee09compiler, author = {Jongeun Lee and Aviral Shrivastava}, title = {Compiler-Managed Register File Protection for Energy-Efficient Soft Error Reduction}, year = 2009, booktitle = {the 14th Asia and South Pacific Design Automation Conference (ASP-DAC)}, pages = {618-623}, month = jan, doi = {10.1109/ASPDAC.2009.4796549}, } @inproceedings{kannan09aspdac, author = {Arun Kannan and Aviral Shrivastava and Amit Pabalkar and Jongeun Lee}, title = {A Software Solution for Dynamic Stack Management on Scratch Pad Memory}, year = 2009, booktitle = {the 14th Asia and South Pacific Design Automation Conference (ASP-DAC)}, pages = {612-617}, month = jan, } @Article{lee08ijes, author = {Jongeun Lee and Kiyoung Choi and Nikil Dutt}, title = {Evaluating Memory Architectures for Media Applications on Coarse-grained Reconfigurable Architectures}, journal = {International Journal of Embedded Systems}, issn = {1741-1068}, year = 2008, volume = {3}, number = {3}, pages = {119-127}, month = jul, note = {edited by Ed F. Deprettere and Shuvra S. Bhattacharyya}, publisher = {Inderscience}, doi = {10.1109/ASAP.2003.1212841}, } @inproceedings{lee08codes, author = {Jongeun Lee and Aviral Shrivastava}, title = {Static Analysis of Processor Stall Cycle Aggregation}, year = 2008, booktitle = {IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS)}, series = {CODES+ISSS '08}, location = {Atlanta, GA, USA}, pages = {25-30}, isbn = {978-1-60558-470-6}, month = oct, publisher = {ACM}, doi = {10.1145/1450135.1450143}, keywords = {code transformation, embedded systems, low power, memory bound loops, processor free time, stall cycle aggregation}, } @inproceedings{pabalkar08simultaneous, title = {{SDRM}: Simultaneous Determination of Regions and Function-to-Region Mapping for Scratchpad Memories}, author = {Amit Pabalkar and Aviral Shrivastava and Arun Kannan and Jongeun Lee}, booktitle = {International Conference on on High Performance Computing (HiPC)}, year = 2008, month = dec, doi = {10.1007/978-3-540-89894-8_49}, } @article{lee07instruction, author = {Jongeun Lee and Kiyoung Choi and Nikil Dutt}, title = {Instruction Set Synthesis with Efficient Instruction Encoding for Configurable Processors}, journal = TODAES, issn = ITODAES, volume = 12, number = 1, month = jan, year = 2007, pages = {1-37}, publisher = {ACM}, address = {New York, NY, USA}, doi = {10.1145/1188275.1188283}, } @InBook{lee07designing, author = {Jongeun Lee and Kiyoung Choi and Nikil Dutt}, editor = {J\"{o}rg Henkel and Sri Parameswaran}, title = {Designing Embedded Processors: A Low Power Perspective}, chapter = {Synthesis of Instruction Sets for High-Performance and Energy-Efficient ASIP}, publisher = {Springer}, year = 2007, month = aug, pages = {51-64}, } @misc{choi07pat, title = {조건실행을 지원하는 재구성 가능한 프로세싱 요소의 배열구조}, titleE = {Array of Reconfigurable Processing Elements for Providing Predicated Execution}, inventor = {최기영, 정진용, 이종은, 김윤진, 강신원}, assignee = {재단법인서울대학교산학협력재단}, appl_no = {10-2005-0008689}, filing_date = {2005.01.31}, pat_no = {10-0722770-0000}, issue_date = {2007.05.22}, publisher = {Korea}, year = 2007, } @article{lee05system, author = {Jongeun Lee and Woo-Cheol Kwon and Taehoon Kim and Eui-Young Chung and Kyu-Myoung Choi and Jeong-Taek Kong and Soo-Kwan Eo and David Gwilt}, title = "System Level Architecture Evaluation and Optimization: an Industrial Case Study with {AMBA3} {AXI}", journal = {Journal of Semiconductor Technology and Science}, issn = "1598-1657", volume = 5, number = 4, pages = {229-237}, year = 2005, } @inproceedings{lee04conditional, author = {Jongeun Lee and Yoonjin Kim and Jinyong Jung and Shinwon Kang and Kiyoung Choi}, title = "Reconfigurable {ALU} Array Architecture with Conditional Execution", booktitle = {International SoC Design Conference}, pages = {222-226}, year = 2004, } @article{lee03algorithm, author = {Jongeun Lee and Kiyoung Choi and Nikil D. Dutt}, title = {An Algorithm for Mapping Loops onto Coarse-Grained Reconfigurable Architectures}, journal = SPLAN # " (LCTES '03)", issn = ISPLAN, volume = 38, number = 7, year = 2003, month = jul, pages = {183-188}, doi = {10.1145/780731.780758}, address = {New York, NY, USA}, } @inproceedings{lee03energy, author = {Jongeun Lee and Kiyoung Choi and Nikil Dutt}, title = {Energy-Efficient Instruction Set Synthesis for Application-Specific Processors}, booktitle = {ACM International Symposium on Low Power Electronics and Design (ISLPED)}, year = 2003, pages = {330-333}, doi = {10.1145/871506.871588}, } @misc{kim03pat, title = {실제 프로세서를 이용한 낙관적 실행에 의한하드웨어-소프트웨어 통합 검증방법}, titleE = {Method for Hardware-software Coverification by Optimistic Execution of Real Processor}, inventor = {김현철, 최기영, 유승주, 이종은, 정진용, 나경석, 조영철}, assignee = {한국 MDS (주)}, appl_no = {10-2000-0002175}, filing_date = {2000.01.18}, pat_no = {10-0368546-0000}, issue_date = {2003.01.06}, publisher = {Korea}, year = 2003, } @article{lee03compilation, author = {Jongeun Lee and Kiyoung Choi and Nikil Dutt}, title = {Compilation Approach for Coarse-grained Reconfigurable Architectures}, journal = DT, issn = IDT, volume = 20, number = 1, month = jan # "/" # feb, pages = {26-33}, year = 2003, doi = {10.1109/MDT.2003.1173050}, } @inproceedings{lee03evaluating, author = {Jongeun Lee and Kiyoung Choi and Nikil Dutt}, title = {Evaluating Memory Architectures for Media Applications on Coarse-Grained Reconfigurable Architectures}, booktitle = {IEEE Conference on Application-Specific Systems, Architectures, and Processors (ASAP)}, month = jun, pages = "172-182", year = 2003, } @inproceedings{lee03design, author = {Jongeun Lee and Kiyoung Choi and Nikil Dutt}, title = {Design Space Exploration of Reconfigurable {ALU} Array ({RAA}) Architectures}, booktitle = {SoC Design Conference}, year = 2003, } @inproceedings{lee02efficient, author = {Jongeun Lee and Kiyoung Choi and Nikil Dutt}, title = {Efficient Instruction Encoding for Automatic Instruction Set Design of Configurable {ASIP}s}, booktitle = {IEEE/ACM International Conference on Computer-Aided Design (ICCAD)}, year = 2002, pages = {649-654}, doi = {10.1109/ICCAD.2002.1167601}, } @inproceedings{yoo00fast, title = "Fast Hardware-Software Coverification by Optimistic Execution of Real Processor", author = {Sungjoo Yoo and Jongeun Lee and Jinyong Jung and Kyeongseok Rha and Youngchul Cho and Kiyoung Choi}, booktitle = {Design, Automation and Test in Europe (DATE)}, year = 2000, doi = {10.1109/DATE.2000.840857}, } @inproceedings{yoo99fast, title = "Fast Prototyping of an {IS}-95 {CDMA} Cellular Phone: A Case Study", author = {Sungjoo Yoo and Jongeun Lee and Jinyong Jung and Kyeongseok Rha and Youngchul Cho and Kiyoung Choi}, booktitle = {Asia Pacific Conference on Hardware Description Languages (APCHDL)}, year = 1999, } @article{lee98speech, title = {Speech Independent Speaker Recognition System Using Local Accumulation Based Decision Network}, author = {Jongeun Lee and Jinyoung Choi}, journal = {Korean Fuzzy Logic \& Intelligent System Society}, volume = 8, number = 2, pages = {82-95}, year = 1998, } @MastersThesis{aidyn18thesis, author = {Aidyn Zhakatayev}, title = {Sign-Magnitude Stochastic Computing}, school = UNIST, month = aug, year = 2018, } @MastersThesis{kim18thesis, author = {Daewoo Kim}, title = {Reconfigurable SIMD Multiply-and-Accumulator and Efficient On-Chip Training of Deep Neural Networks}, school = UNIST, month = aug, year = 2018, } @MastersThesis{rahman16thesis, author = {Atul Rahman}, title = {Efficient FPGA Acceleration of Convolutional Deep Neural Networks}, school = UNIST, month = aug, year = 2016, } @MastersThesis{nguyen16thesis, author = {Dong Nguyen}, title = {Communication-aware Mapping of Stream Graphs for Multi-GPU Platforms}, school = UNIST, month = feb, year = 2016, } @MastersThesis{lee16thesis, author = {Hongsik Lee}, title = {Application-Level Performance Improvement for Stream Program on CGRA-based systems}, school = UNIST, month = feb, year = 2016, } @MastersThesis{seo14thesis, author = {Seongseok Seo}, title = {Scaling Kernel Speedup to Application-level Performance with CGRAs: Stream Program Approach}, school = UNIST, month = feb, year = 2014, } @MastersThesis{jeong13thesis, author = {Yeonghun Jeong}, title = {Evaluator-executor Transformation for Efficient Conditional Statements on CGRA}, school = UNIST, month = jun, year = 2013, } @MastersThesis{mai13thesis, author = {Toan X. Mai}, title = {Runtime and Install-time Binary Translation for Reconfigurable Accelerators}, school = UNIST, month = feb, year = 2013, } @PhdThesis_old{lee04thesis, author = {Jongeun Lee}, title = {Architecture Customization of Configurable Processors and Reconfigurable {ALU} Arrays}, school = {Seoul National University}, month = feb, year = 2004, }