(Zhang 2015 fpga) Optimizing FPGA-based Accelerator Design for Deep Convolutional Neural Networks.
(Chippa 2014 islped) StoRM: A Stochastic Recognition and Mining Processor.
Day 3, Tue 11/10, Yesung Kang, Sunmin Kim, #401-11
Approximate multiplier (Yesung Kang)
Cong Liu; Jie Han; Lombardi, F., "A low-power, high-performance approximate multiplier with configurable partial error recovery," in Design, Automation and Test in Europe Conference and Exhibition (DATE), 2014 , vol., no., pp.1-4, 24-28 March 2014.
Yuan-Ho Chen, "An Accuracy-Adjustment Fixed-Width Booth Multiplier Based on Multilevel Conditional Probability," in Very Large Scale Integration (VLSI) Systems, IEEE Transactions on , vol.23, no.1, pp.203-207, Jan. 2015.
Zervakis, Georgios; Xydis, Sotirios; Tsoumanis, Kostas; Soudris, Dimitrios; Pekmestzi, Kiamal, "Hybrid approximate multiplier architectures for improved power-accuracy trade-offs," in Low Power Electronics and Design (ISLPED), 2015 IEEE/ACM International Symposium on , vol., no., pp.79-84, 22-24 July 2015.
Neuromorphic design (Sunmin Kim)
Sinha, S.; Jounghyuk Suh; Bakkaloglu, B.; Cao, Yu, "Workload-aware neuromorphic design of low-power supply voltage controller," in Low-Power Electronics and Design (ISLPED), 2010 ACM/IEEE International Symposium on , vol., no., pp.241-246, 18-20 Aug. 2010.
Day 4, Thu 11/26, Hyeonuk, Sangyun, #411
FPGA implementation of deep belief network (Hyeonuk Sim)