Publications

Note: ACM Publication Free Download List

View [Categorical] [Pre-2009] [BibTeX]

2019

  • Efficient FPGA Implementation of Local Binary Convolutional Neural Network, Aidyn Zhakatayev and Jongeun Lee**, Proc. of the 24th Asia and South Pacific Design Automation Conference (ASP-DAC), January, 2019.

  • On-chip Memory Optimization for High-level Synthesis of Multi-dimensional Data on FPGA, Daewoo Kim, Sugil Lee, and Jongeun Lee**, Proc. of the 24th Asia and South Pacific Design Automation Conference (ASP-DAC), January, 2019.

  • Log-Quantized Stochastic Computing for Memory and Computation Efficient DNNs, Hyeonuk Sim and Jongeun Lee**, Proc. of the 24th Asia and South Pacific Design Automation Conference (ASP-DAC), January, 2019.

  • XOMA: Exclusive On-Chip Memory Architecture for Energy-Efficient Deep Learning Acceleration, Hyeonuk Sim, Jason H. Anderson, and Jongeun Lee**, Proc. of the 24th Asia and South Pacific Design Automation Conference (ASP-DAC), January, 2019.

2018

  • Double MAC on a DSP: Boosting the Performance of Convolutional Neural Networks on FPGAs, Sugil Lee, Daewoo Kim, Dong Nguyen, and Jongeun Lee**, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2018.

  • An Efficient and Accurate Stochastic Number Generator Using Even-distribution Coding, Aidyn Zhakatayev, Kyounghoon Kim, Jongeun Lee**, and Kiyoung Choi, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2018.

  • FPGA Architecture Enhancements for Efficient BNN Implementation, Jin-Hee Kim, Jongeun Lee, and Jason H. Anderson, Proc. of IEEE International Conference on Field Programmable Technology (FPT), December, 2018.

  • Overcoming Crossbar Nonidealities in Binary Neural Networks Through Learning, Mohammed E. Fouda, Jongeun Lee, Ahmed M. Eltawil, and Fadi Kurdahi, Proc. of 14th IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH), July, 2018.

  • DPS: Dynamic Precision Scaling for Stochastic Computing-Based Deep Neural Networks, Hyeonuk Sim, Saken Kenzhegulov, and Jongeun Lee**, Proc. of 55th Annual ACM/IEEE Design Automation Conference (DAC), June, 2018.

  • Sign-Magnitude SC: Getting 10X Accuracy for Free in Stochastic Computing for Deep Neural Networks, Aidyn Zhakatayev, Sugil Lee, Hyeonuk Sim, and Jongeun Lee**, Proc. of 55th Annual ACM/IEEE Design Automation Conference (DAC), June, 2018.

  • Architecture Exploration of Standard-Cell and FPGA-Overlay CGRAs Using the Open-Source CGRA-ME Framework, S. Alexander Chin, Kuang Ping Niu, Matthew Walker, Shizhang Yin, Alexander Mertens, Jongeun Lee, and Jason H. Anderson, Proc. of International Symposium on Physical Design (ISPD), March, 2018.

  • Reducing FPGA Area Using Nano-Switch Devices in Inter and Intra-Logic Routing, Aidyn Zhakatayev and Jongeun Lee**, Proc. of the 25th Korean Conference on Semiconductors, February, 2018.

2017

2016

2015

  • Scalable Application Mapping for SIMD Reconfigurable Architecture, Yongjoo Kim, Jinyong Lee, Jongeun Lee*, and Yunheung Paek, Journal of Semiconductor Technology and Science, 6(15), pp. 634-646, IEEK, December, 2015.

  • Approximate De-randomizer for Stochastic Circuits, Kyounghoon Kim, Jongeun Lee, and Kiyoung Choi, Proc. of the 12th International SoC Design Conference (ISOCC), November, 2015.

  • Optimizing Stream Program Performance on CGRA-based Systems, Hongsik Lee, Dong Nguyen, and Jongeun Lee**, Proc. of the 52nd Annual Design Automation Conference (DAC), pp. 110:1-110:6, ACM, 2015.

  • Pipelining Nested Loops with Triangular Iteration Space for High-Level Synthesis, Atul Rahman, Hyeonuk Sim, and Jongeun Lee**, Proc. of the 22nd Korean Conference on Semiconductors, February, 2015.

  • Optimization of Streaming Application with Limited Scratch-pad Memory on Coarse-Grained Reconfigurable Architecture, Hongsik Lee and Jongeun Lee, Proc. of the 22nd Korean Conference on Semiconductors, February, 2015.

  • Optimal Resource-aware Mapping of Stream Graphs to GP-GPUs, Dong Nguyen and Jongeun Lee, Proc. of the 22nd Korean Conference on Semiconductors, February, 2015.

2014

2013

2012

2011

2010

2009


Master's Theses


  1. Dong Nguyen, Communication-aware Mapping of Stream Graphs for Multi-GPU Platforms, Ulsan National Institute of Science and Technology, February, 2016.
    Thesis Committee: Jongeun Lee (Chair), Woongki Baek, and Wonki Jeong.

  2. Hongsik Lee, Application-Level Performance Improvement for Stream Program on CGRA-based systems, Ulsan National Institute of Science and Technology, February, 2016.
    Thesis Committee: Jongeun Lee (Chair), Woongki Baek, and Seokhyeong Kang.

  3. Seongseok Seo, Scaling Kernel Speedup to Application-level Performance with CGRAs: Stream Program Approach, Ulsan National Institute of Science and Technology, February, 2014.
    Thesis Committee: Jongeun Lee (Chair), Won-ki Jeong, and Giljin Jang.

  4. Yeonghun Jeong, Evaluator-executor Transformation for Efficient Conditional Statements on CGRA, Ulsan National Institute of Science and Technology, June, 2013.
    Thesis Committee: Jongeun Lee (Chair), Won-ki Jeong, and Youngri Choi.

  5. Toan X. Mai, Runtime and Install-time Binary Translation for Reconfigurable Accelerators, Ulsan National Institute of Science and Technology, February, 2013.
    Thesis Committee: Jongeun Lee (Chair), Beomseok Nam, and Won-Ki Jeong.